Renesas Electronics /R7FA6T2BD /ADC_B /ADPGACR2

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Interpret as ADPGACR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PGADEN 0 (0)PGASEL1 0 (0)PGAENAMP 0 (0)PGAGEN 0 (00)PGADG 0 (0x0)PGAGAIN

PGAGEN=0, PGAENAMP=0, PGASEL1=0, PGADEN=0, PGADG=00, PGAGAIN=0x0

Description

Programmable Gain Amplifier Control Register 2

Fields

PGADEN

PGA Unit n Input Mode Select

0 (0): Single-ended Input mode

1 (1): Pseudo-differential Input mode

PGASEL1

PGA Unit n Amplifier Output Enable

0 (0): Not output the signal in a path through the PGA

1 (1): Output the signal in a path through the PGA

PGAENAMP

PGA Unit n Enable

0 (0): Disable the PGA

1 (1): Enable the PGA

PGAGEN

PGA Unit n Gain Setting Enable

0 (0): Disable gain setting

1 (1): Enable gain setting

PGADG

PGA Unit n Differential Input Gain Setting

0 (00): × 1.500

1 (01): × 2.333

2 (10): × 4.000

3 (11): × 5.667

PGAGAIN

PGA Unit n Gain Setting

0 (0x0): × 2.000 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

1 (0x1): × 2.500 (PGA is Single-ended Input mode) × 1.500 (PGA is Pseudo-differential Input mode)

2 (0x2): × 2.667 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

3 (0x3): × 2.857 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

4 (0x4): × 3.077 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

5 (0x5): × 3.333 (PGA is Single-ended Input mode) × 2.333 (PGA is Pseudo-differential Input mode)

6 (0x6): × 3.636 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

7 (0x7): × 4.000 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

8 (0x8): × 4.444 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

9 (0x9): × 5.000 (PGA is Single-ended Input mode) × 4.000 (PGA is Pseudo-differential Input mode)

10 (0xA): × 5.714 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

11 (0xB): × 6.667 (PGA is Single-ended Input mode) × 5.667 (PGA is Pseudo-differential Input mode)

12 (0xC): × 8.000 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

13 (0xD): × 10.000 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

14 (0xE): × 13.333 (PGA is Single-ended Input mode) Setting prohibited (PGA is Pseudo-differential Input mode)

15 (0xF): Setting prohibited

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